A Low Density Parity Check (LDPC) code as a kind of error-correcting code has a high error-correcting ability. In recent years, for example, the LDPC code has been widely adopted in a transmission system for a digital broadcasting, etc. such as Digital Video Broadcasting (DVB)-T.2, in Europe etc., DVB-S.2, and DVB-C.2, and Advanced Television System Committee (ATSC) 3.0 in USA, etc. (for example, refer to NPL 1).
FIG. 1 represents robustness in the case where 64,800 bits becoming a data unit of the LDPC code, for example, are transmitted in accordance with a 64K16 quadrature amplitude modulation (QAM) system. As depicted in the figure, 64,800 bits are structured by lining up 180 bit streams each having 360 bits, and the robustness differs with 360 bits as a unit.
Therefore, in transmitting the LDPC codes in accordance with the 64K16QAM system, bit interleave processing is executed in such a way that the robustness of the bit streams is dispersed.
FIG. 2 depicts a situation of the bit interleave processing which has heretofore been adopted in DVB-T.2, etc. As has been described above, in this interleaver (Permute), the interleave processing is executed with the aim of only the dispersion of the robustness.
FIG. 3 depicts an example of a configuration of an LDPC decoder for decoding the LDPC codes, which is adopted in a receiving apparatus for DVB-T.2, etc., and a configuration of a preceding stage of the LDPC decoder.
LDPC codes 11 which have been transmitted in accordance with the 64K16QAM system after transmission data was LDPC-coded on a transmission side, and the bit interleave processing was executed are inputted one symbol by one symbol (for 4 bits) to a demapper 12. The demapper 12 calculates a probability that each bit structuring one symbol is 0, and a probability that each bit structuring one symbol is 1 for each bit structuring one symbol.
A bit deinterleaver (Bit DeINT Memory) 13 executes bit deinterleave (reverse permutation sorting) processing for carrying out restoration of bit interleave (permutation sorting) processing executed on the transmission side.
An LDPC decoder 14 is configured in such a way that the data streams inputted in serial after the bit interleave reverse processing are converted in parallel so as for each of them to have a predetermined bit width (360 bits in case of the 64K16QAM system), and the original transmission data before the LDPC coding is then restored based on the probability of likelihood of 0 of each bit having the predetermined bit width, and the probability of likelihood of 1 of each bit having the predetermined bit width.